In a conventional art, a device for executing any operation has been embodied using hardware or software. For example, when a network controller for executing a network interface is embodied on a computer chip, the network controller executes only a network interface function defined when fabricated in a factory. It may not be possible for the network interface function to be changed after the network controller is fabricated in the factory. This is an example in the case of using the hardware. Alternatively, there is the case of using software. For example, a program capable of executing desired functions is programmed and the program is executed in a general purpose processor, so that purposes of a user are satisfied. In the case of using the software, it is possible to execute new functions by modifying the software even after the hardware is fabricated in the factory. In the case of using the software, diverse functions can be executed using a given hardware, however, there arises a problem in that a speed is relatively slower than that in the case of using the hardware.
In order to overcome problems occurring in the case of the software and hardware, a reconfigurable processor (RP) architecture has been suggested. The RP architecture may be customized in order to overcome a problem even after a device is fabricated, and a calculation, which is spatially customized in order to execute the calculation, may be used.
The RP architecture may be embodied using a processor core and a coarse grained array (CGA), which are able to execute a plurality of instructions in parallel.
In the present specification, a method of simulating power and a power simulator, which are applicable to the RP architecture including the CGA, are disclosed.